Thursday, 10 January 2013

VLSI - NOTE - DRAM CHIPS

DRAM CHIPS


DRAM MEMORY CELL
Dynamic random access memory (DRAM) is defined as random
access memory with a refresh operation for maintaining
the stored data. DRAM has always been the leading semiconductor
product which requires advanced semiconductor device
and fabrication technology (1–3). DRAM is the most popular
memory device because of its high performance-to-cost ratio.
In comparison with other kinds of memories (4,5), DRAM has
a very simple memory cell. One transistor and one capacitor
type is the most popular cell type in present DRAM. Figure 1
shows the schematic diagram of the basic memory cell for
DRAM. The data depend on the amount of charge on the capacitor.
For example, ample amount of charge stored on a capacitor
is recognized as logic-1, while no charge stored on a
capacitor is recognized as logic-0. This data storage capacitor
is selected by the switched transistor. The storage capacitor
is very important for DRAM performance. Since the capacitor
leaks some charges, large capacitance is a great advantage
in maintaining data integrity. Additionally large capacitance
could improve speed performance. shows the cross
section of a conventional planar DRAM cell. Since minimum
Cross-sectional view of trench capacitor cell.
area consumption is allowed in order to achieve a high-density
DRAM, the structure of the cell capacitor is modified in
the vertical dimension for the advanced memory cell, unlike
for the conventional plane capacitor. Figures 3 and 4 show
the diagrams of two present well-known fundamental threedimensional
capacitor cells (6–9). To achieve the required
minimum value of capacitance, both approaches have been
successful in minimizing the area consumption and fabrication process complexity. Furthermore, a variety of shapes of  capacitor electrodes have been investigated in order to obtain

larger capacitance in a small area for higher density. An advanced three-dimensional capacitor cell. This
higher-density versions. In addition to the above-mentioned
approaches, larger capacitance with high dielectric insulator
and enlarged surface area by microvillus patterning of elec-

trode technology have been investigated for the next-generation
memory cells






No comments:

Post a Comment